cognimem logo, hardwired parallel architecture, scalable, low power, decision space mapping, CogniBlox, CBX, 4K neurons, data mining, analytics, cognitive memory, sensor input, 4 CM1K's, 4096 cognitive memories, CM1K, 1K Neuron Chip, CM1K speed, High-speed pattern recognition, parallel architecture, non-linear classifier, CogniMem Architecture, CPU, HPC architecture, DSP, storage, CogniMem, Cognitive Computing, Artificial intelligence,clustering,data mining,expandable neural network,global sensing,Machine learning,neural network chip,neuron chip,neuronal processor,neurons,parallel neural network,pattern matching,pattern recognition chip,Restricted Coulomb Energy,smart sensors,super computing,trainable neural network
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  • CME2K - CogniMem module with hirose
    interconnect (from 2048 neurons to 12,288
    for a stack of 6).
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Related Documents

Tracking  objects of interest and detecting an event real time are naturals for the CogniMem technology. Practical distributed detection by many sensors can be made a reality with this technology. Real time event detection saves the user communication bandwidth as well as monitoring resources. Applications are numerous in the defense industry wherein neural network technology has been embraced. CogniMem is a direct hardware implementation.

Read more from an expert

Abstract from the book “Target Tracking with the Zero Instruction Set Computer” released in 2010 by Wendall R. Deck.  ZISC is nothing more than the ancestor of our CM1K chip. (“ancestor of our CM1K chip” should link to Company Profile/Background).

“The Zero Instruction Set Computer (ZISC) is an integrated circuit containing a Restricted Coulomb Energy neural network that employs parallelism to execute many operations in very short time periods. We evaluate the computational capability of this device in the context of using it for image pattern recognition, seeking to consume less time than a computer without the ZISC. We discuss the feasibility of using a correlation coefficient calculation to determine if a portion of an image is a match to a given pattern, and describe a serial algorithm to use on a computer without the ZISC. We also discuss four algorithms that are implemented on a computer that accesses a ZISC via the PCI bus. The results of our experiments show that the performance of our ZISC-based algorithms is indeed an improvement over the serially-implemented algorithm.”

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