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CogniMem™ Technologies is a fabless semi-conductor company designing components for high speed and parallel pattern recognition. Its research and design efforts target two extreme usage models:
(1) Embed intelligence into miniature sensory devices without impeding their performance in speed and power consumption , and
(2) Enable the design of cognitive computing systems in which massive hard-wired parallelism prevails over high power consumption and frequency clocks, just like in the human brain.
These two axes of development will bridge in “TheCloud” connecting devices instrumenting the planet to artificial intelligent systems, thus performing the so-called “global sensing”
Mission
- Develop generic pattern recognition on a chip, never forgetting that practicality is the essence with increase of speed performance, and decrease in size, power consumption and cost.
- Build a library of IP cores suitable for integration into chips targeting miniature sensory devices as well as massively parallel computing systems.
Background
- 1993: Guy Paillet, one of the founder of CogniMem™ Technologies Inc, presents the concept of a self trainable parallel neural network chip to IBM and works with a team at the IBM lab in Essonnes, France to produce an ASIC trademarked by IBM as the Zero Instruction Set Computer (ZISC) chip with 36 neurons.
- 1999: IBM re-spins the chip using a 0.25 micon technology and releases the ZISC78 with 78 neurons.
- 2001: IBM discontinues the manufacturing of the ZISC chip in 2001.
- 2006: Guy Paillet and Anne Menendez (also one of the founders of CogniMem Technologies Inc) start the design of the CM1K chip, a successor of the ZISC chip, featuring one thousand (1K) neurons in parallel.
- 2007: OKI is contracted to manufacture the CM1K and the first batch of CM1K chips is received in January 2008.
- 2011: CogniMem Technologies Inc. is established and headquartered in Folsom, California. Lead by Bruce McCormick, the third founder of the company, its mission is to market the existing CM1K chip and design and develop next generations of pattern recognition chips targeting usage models in sensory devices as well as cognitive computing systems.